SRAMUAP=00, SRAMLAP=00, DDRSIZE=00
Control Register
| RESERVED | no description available |
| RESERVED | no description available |
| RESERVED | no description available |
| DDRSIZE | DDR address size translation 0 (00): DDR address translation is disabled 1 (01): DDR size is 128 Mbytes 2 (10): DDR size is 256 Mbytes 3 (11): DDR size is 512 Mbytes |
| RESERVED | no description available |
| SRAMUAP | SRAM_U arbitration priority 0 (00): Round robin 1 (01): Special round robin (favors SRAM backoor accesses over the processor) 2 (10): Fixed priority. Processor has highest, backdoor has lowest 3 (11): Fixed priority. Backdoor has highest, processor has lowest |
| SRAMUWP | SRAM_U write protect |
| RESERVED | no description available |
| SRAMLAP | SRAM_L arbitration priority 0 (00): Round robin 1 (01): Special round robin (favors SRAM backoor accesses over the processor) 2 (10): Fixed priority. Processor has highest, backdoor has lowest 3 (11): Fixed priority. Backdoor has highest, processor has lowest |
| SRAMLWP | SRAM_L Write Protect |
| RESERVED | no description available |